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INTEGRATED CIRCUITS
DATA SHEET
74LVC07A Hex buffer with open-drain outputs
Product specification Supersedes data of 2003 Feb 25 2003 Nov 11
Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
FEATURES * 5 V tolerant inputs and outputs (open drain) for interfacing with 5 V logic * Wide supply voltage range from 1.65 to 5.5 V * CMOS low power consumption * Direct interface with TTL levels * Inputs accept voltages up to 5 V * Complies with JEDEC standard no. 8-1A * ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL tPLZ/tPZL CI CPD Note 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL x VCC2 x fo) = sum of the outputs. 2. The condition is VI = GND to VCC FUNCTION TABLE See note 1. INPUT nA L H Note 1. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. OUTPUT nY L Z PARAMETER propagation delay nA to nY input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V DESCRIPTION
74LVC07A
The 74LVC07A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 to 5 V environment. The 74LVC07A provides six non-inverting buffers. The outputs of the 74LVC07A are open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
TYPICAL 2.2 5.0 6.0 ns pF pF
UNIT
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE 74LVC07AD 74LVC07APW 74LVC07ABQ PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1A 1Y 2A 2Y 3A 3Y GND 4Y 4A 5Y 5A 6Y 6A VCC SYMBOL data input data output data input data output data input data output ground (0 V) data output data input data output data input data output data input supply voltage DESCRIPTION -40 to +125 C -40 to +125 C -40 to +125 C PINS 14 14 14 PACKAGE SO14 TSSOP14 DHVQFN14
74LVC07A
MATERIAL plastic plastic plastic
CODE SOT108-1 SOT402-1 SOT762-1
handbook, halfpage
1A 1
VCC 14 13 12 6A 6Y 5A 5Y 4A
handbook, halfpage
1A 1Y 2A 2Y 3A 3Y GND
1 2 3 4 5 6 7
MNA531
14 VCC 13 6A
1Y 2A
2 3 4 5 6 7 Top view GND 8 4Y
12 6Y
07
11 5A 10 5Y 9 8 4A
2Y 3A 3Y
GND(1)
11 10 9
4Y
MBL760
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration SO14 and TSSOP14.
Fig.2 Pin configuration DHVQFN14.
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
handbook, halfpage
1
1A
1Y 2
handbook, halfpage
1A
1
1
2
1Y
3
2A
2Y 4
2A
3
1
4
2Y
5
3A
3Y 6
3A
5
1
6
3Y
9
4A
4Y 8
4A
11 5A 5Y 10
9
1
8
4Y
5A
13 6A 6Y 12
11
1
10
5Y
6A
MNA535
13
1
MNA534
12
6Y
Fig.3 Logic symbol.
Fig.4 IEC logic symbol.
handbook, halfpage
Y A GND
MNA533
Fig.5 Logic diagram (one gate).
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall ratios VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V active mode high-impedance mode CONDITIONS 0 0 0 -40 0 0 MIN. 1.65
74LVC07A
MAX. 5.5 5.5 5.5 5.5 +125 20 10 V V V V
UNIT
C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO14 packages: above 70 C derate linearly with 8 mW/K. For TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K. PARAMETER supply voltage input diode current input voltage output clamping diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation Tamb = -40 to +125 C; note 2 VI < 0 note 1 VO < 0 active mode; note 1 high-impedance mode; note 1 VO = 0 to VCC CONDITIONS - -0.5 - -0.5 -0.5 - - -65 - MIN. -0.5 MAX. +6.5 -50 +6.5 -50 +6.5 +6.5 50 100 +150 500 V mA V mA V V mA mA C mW UNIT
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 C; note 1 VIH HIGH-level input voltage 1.65 to 1.95 VCC 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA ILI IOZ Ioff ICC ICC input leakage current output leakage current power-off leakage current quiescent supply current VI = 5.5 V or GND VI = VIH; VO = 5.5 V or GND VI or VO = 5.5 V VI = VCC or GND; IO = 0 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 1.65 to 5.5 1.65 to 5.5 0.0 5.5 2.3 to 5.5 - - - - - - - - - - - - - - - - - 0.1 0.1 0.1 0.1 5 1.7 2.0 - - - - - - - - - - - VCC (V) MIN. TYP.
74LVC07A
MAX.
UNIT
V V V V V V V
0.7 x VCC - - - -
1.65 to 1.95 -
GND 0.7 0.8
0.30 x VCC V 0.20 0.45 0.3 0.4 0.55 0.55 5 10 10 10 500 V V V V V V A A A A A
additional quiescent supply VI = VCC - 0.6 V; current per input pin IO = 0
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +125 C VIH HIGH-level input voltage 1.65 to 1.95 VCC 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA ILI IOZ Ioff ICC ICC Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C. input leakage current output leakage current power-off leakage current quiescent supply current VI = 5.5 V or GND VI = VIH; VO = 5.5 V or GND VI or VO = 5.5 V VI = VCC or GND; IO = 0 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 1.65 to 5.5 1.65 to 5.5 0.0 5.5 2.3 to 5.5 - - - - - - - - - - - - - - - - - - - - - - 0.20 0.45 0.3 0.4 0.55 0.55 5 10 10 10 500 V V V V V V A A A A A 1.7 2.0 - - - - - - - - - - - GND 0.7 0.8 V V V V V V V VCC (V) MIN. TYP. MAX. UNIT
0.7 x VCC - - - -
1.65 to 1.95 -
0.30 x VCC V
additional quiescent supply VI = VCC - 0.6 V; current per input pin IO = 0
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
AC CHARACTERISTICS GND = 0 V; tr = tf 2 ns for VCC 2.7 V and tr = tf 2.5 ns for VCC 2.7 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = -40 to +85 C; note 1 tPLZ/tPZL propagation delay nA to nY see Figs 6 and 7 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Tamb = -40 to +125 C tPLZ/tPZL propagation delay nA to nY see Figs 6 and 7 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Note - 0.5 0.5 0.5 0.5 - - - - - - 0.5 0.5 0.5 0.5 2.5 1.6 2.4 2.2 1.6 VCC (V) MIN. TYP.
74LVC07A
MAX.
UNIT
- 2.8 3.3 3.6 2.6 - 3.5 4.5 4.5 3.5
ns ns ns ns ns
ns ns ns ns ns
1. All typical values are measured at Tamb = 25 C and at VCC = 1.8, 2.5, 2.7, 3.3 and 5.0 V, respectively.
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
AC WAVEFORMS
74LVC07A
handbook, full pagewidth
VI nA input GND t PLZ VCC nY output VOL VX
MNA528
VM
t PZL
VM
VCC <2.7 V 2.7 to 3.6 V 4.5 to 5.5 V 1.5 V
VM 0.5 x VCC 0.5 x VCC
VX VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V Fig.6 The input nA to output nY propagation delays.
handbook, full pagewidth
Vext VCC PULSE GENERATOR VI D.U.T. RT
MNA530
VO
RL
CL
RL
VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V
Vext 2 x VCC 2 x VCC 6V 6V 2 x VCC VCC VCC
VI
CL 30 pF 30 pF 50 pF 50 pF 50 pF
RL 1 k 500 500 500 500
2.7 V 2.7 V VCC
Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.7 Load circuitry for switching times.
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm
74LVC07A
SOT108-1
D
E
A X
c y HE vMA
Z 14 8
Q A2 A1 pin 1 index Lp 1 e bp 7 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
inches 0.069 Note
0.010 0.057 0.004 0.049
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
8 0o
o
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
2003 Nov 11
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c y HE vMA
Z
14
8
Q A2 pin 1 index A1 Lp L (A 3) A
1
e bp
7
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
2003 Nov 11
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm
D
B
A
A A1 E c
terminal 1 index area
detail X
terminal 1 index area e 2 L
e1 b 6 vMCAB wM C y1 C
C y
1 Eh 14
7 e 8
13 Dh 0
9 X 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
2003 Nov 11
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Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
74LVC07A
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R20/03/pp14
Date of release: 2003
Nov 11
Document order number:
9397 750 11931
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